Memory Optimized Dual Port TCAM for Intrusion Detection

In intrusion detection among different hardware approaches, memory-based architecture has attracted a lot of attention be-cause of its easy reconfigurability and scalability. In order to accommodate the increasing number of attack patterns and meet the throughput requirement of networks, a successful network intrusion detection system must have a memory-efficient patternmatching algorithm and hardware design. In an efficient pattern-matching algorithm for memory architecture, state traversal algorithm was used to significantly reduce the memory requirement. In this paper, an adaptively dividable dual-port TCAM is proposed to further reduction of the memory requirement by which we can achieve a highthroughput, low-power, and low-cost pattern detection processor for mobile devices. The proposed dual-port TCAM is realized with the dualport AND-type match-line scheme which is composed of dual-port dynamic AND gates. The dual-port designs reduce power consumption and increase storage efficiency due to shared storage spaces. The method readily generalizes to higherdimensional pattern matching problems.